dcr2040l42 phase control thyristor preliminary information ds5960-1 february 2010 (ln27056) 1/10 www.dynexsemi.com features double side cooling high surge capability applications high power drives high voltage power supplies static switches voltage ratings part and ordering number repetitive peak voltages v drm and v rrm v conditions dcr2040l42 dcr2040l40 DCR2040L35 4200 4000 3500 t vj = -40c to 125c, i drm = i rrm = 200ma, v drm , v rrm t p = 10ms, v dsm & v rsm = v drm & v rrm + 100v respectively lower voltage grades available. ordering information when ordering, select the required part number shown in the voltage ratings selection table. for example: dcr2040l42 note: please use the complete part number when orde ring and quote this number in any future correspondence relating to your order. key parameters v drm 4200v i t(av) 2040a i tsm 29000a dv/dt* 1500v/s di/dt 400a/s * higher dv/dt selections available outline type code: l (see package details for further information) fig. 1 package outline
semiconductor dcr2040l42 2/10 www.dynexsemi.com current ratings t case = 60c unless stated otherwise symbol parameter test conditions max. units double side cooled i t(av) mean on-state current half wave resistive load 204 0 a i t(rms) rms value - 3204 a i t continuous (direct) on-state current - 2965 a surge ratings symbol parameter test conditions max. units i tsm surge (non-repetitive) on-state current 10ms half sine, t case = 125c 29 ka i 2 t i 2 t for fusing v r = 0 4.2 ma 2 s thermal and mechanical ratings symbol parameter test conditions min. max. units r th(j-c) thermal resistance ? junction to case double side cooled dc - 0.0117 c/w single side cooled anode dc - 0.0187 c/w cathode dc - 0.0329 c/w r th(c-h) thermal resistance ? case to heatsink clamping for ce 37kn double side - 0.0025 c/w (with mounting compound) single side - 0.005 c/w t vj virtual junction temperature blocking v drm / vrrm - 125 c t stg storage temperature range -55 125 c f m clamping force 33.0 41.0 kn
semiconductor dcr2040l42 3/10 www.dynexsemi.com dynamic characteristics symbol parameter test conditions min. max. units i rrm /i drm peak reverse and off-state current at v rrm /v drm , t case = 125c - 200 ma dv/dt max. linear rate of rise of off-state voltage to 67% v drm , t j = 125c, gate open - 1500 v/s di/dt rate of rise of on-state current from 67% v drm to 2x i t(av) - 200 200 a/s gate source 30v, 10 , - 400 400 a/s t r < 0.5s, t j = 125c v t(to) threshold voltage ? low level 500a to 2000a at t case = 125c - 0.9 v threshold voltage ? high level 2000a to 7000a at t case = 125c - 1.08 v r t on-state slope resistance ? low level 500a to 2000 a at t case = 125c - 0.36 m on-state slope resistance ? high level 2000a to 700 0a at t case = 125c - 0.265 m t gd delay time v d = 67% v drm , gate source 30v, 10 - 3 s t r = 0.5s, t j = 25c t q turn-off time t j = 125c, v r = 200v, di/dt = 1a/s, 250 500 s dv dr /dt = 20v/s linear q s stored charge i t = 2000a, t j = 125c, di/dt ? 1a/s, 1000 3000 c i l latching current t j = 25c, v d = 5v - 3 a i h holding current t j = 25c, r g-k = , i tm = 500a, i t = 5a - 300 ma
semiconductor dcr2040l42 4/10 www.dynexsemi.com gate trigger characteristics and ratings symbol parameter test conditions max. units v gt gate trigger voltage v drm = 5v, t case = 25c 1.5 v v gd gate non-trigger voltage at v drm, t case = 125c 0.4 v i gt gate trigger current v drm = 5v, t case = 25c 250 ma i gd gate non-trigger current v drm = 5v, t case = 25c 10 ma curves 0 1000 2000 3000 4000 5000 6000 7000 0.5 1.0 1.5 2.0 2.5 3.0 instantaneous on-state voltage, v t - (v) instantaneous on-state current, i t - (a) min 125c max 125c min 25c max 25c fig.2 maximum & minimum on-state characteristics v tm equation where a = 0.137154 b = 0.132631 v tm = a + bln (i t ) + c.i t +d. i t c = 0.000248 d = -0.001126 these values are valid for t j = 125c for i t 100a to 7000a
semiconductor dcr2040l42 5/10 www.dynexsemi.com 0 2 4 6 8 10 12 14 16 0 1000 2000 3000 4000 mean power dissipation - (kw) mean on-state current, i t(av) - (a) 180 120 90 60 30 0 10 20 30 40 50 60 70 80 90 100 110 120 130 0 500 1000 1500 2000 2500 3000 3500 maximum case temperature, t case ( o c ) mean on-state current, i t(av) - (a) 180 120 90 60 30 fig.3 on - state power dissipation ? sine wave fig.4 maximum permissible case temperature, double side cooled ? sine wave 0 25 50 75 100 125 0 500 1000 1500 2000 2500 3000 maximum heatsink temperature, t heatsink - ( c) mean on-state current, i t(av) - (a) 180 120 90 60 30 0 2 4 6 8 10 12 0 1000 2000 3000 4000 5000 mean power dissipation - (kw) mean on-state current, i t(av) - (a) d.c. 180 120 90 60 30 fig.5 maximum permissible heatsink temperature, double side cooled ? sine wave fig.6 on - state power dissipation ? rectangular wave
semiconductor dcr2040l42 6/10 www.dynexsemi.com 0 10 20 30 40 50 60 70 80 90 100 110 120 130 0 1000 2000 3000 4000 5000 maximum permissible case temperature , t case -(c) mean on-state current, i t(av) - (a) d.c. 180 120 90 60 30 0 25 50 75 100 125 0 1000 2000 3000 4000 maximum heatsink temperature t heatsink -( o c) mean on-state current, i t(av ) - (a) d.c. 180 120 90 60 30 fig.7 maximum permissible case temperature, double side cooled ? rectangular wave fig.8 maximum permissible heatsink temperature, double side cooled ? rectangular wave 0 5 10 15 20 25 30 35 0.001 0.01 0.1 1 10 100 time ( s ) thermal impedance, z thj-c ( c/kw) double side cooling anode side cooling cathode sided cooling 1 2 3 4 double side cooled r i (c/kw) 0.8342 2.6074 4.2073 4.041 t i (s) 0.008639 0.0533503 0.3309504 1.612 anode side cooled r i (c/kw) 0.9647 2.8312 4.9433 9.909 t i (s) 0.0096096 0.0627037 0.4198958 8.908 cathode side cooled r i (c/kw) 0.9285 2.9366 2.3581 26.683 t i (s) 0.0093033 0.0621535 0.3092235 5.835 z th = [r i x ( 1-exp. (t/t i ))] r th(j-c) conduction tables show the increments of thermal resistance r th(j-c) when the device operates at conduction angles other than d.c. double side cooling anode side cooling cathode sided cooling z th (z) z th (z) z th (z) sine. rect. sine. rect. sine. rect. 180 1.45 0.98 180 1.43 0.97 180 1.44 0.97 120 1.68 1.40 120 1.66 1.39 120 1.66 1.39 90 1.93 1.64 90 1.90 1.62 90 1.91 1.63 60 2.16 1.90 60 2.12 1.88 60 2.14 1.89 30 2.34 2.19 30 2.30 2.15 30 2.31 2.17 15 2.42 2.34 15 2.37 2.30 15 2.39 2.31 fig.9 maximum (limit) transient thermal impedance ? junction to case (c/kw)
semiconductor dcr2040l42 7/10 www.dynexsemi.com 10 10 0 11 01 00 num ber o f c yc le s surg e c urr ent, i ts m - (ka) co nd it io ns : tc ase = 125 c v r = 0 pu ls e wi dth = 10 ms 0 10 20 30 40 50 60 70 80 90 10 0 11 01 00 pu lse wid th, t p - ( ms ) surge current, i tsm - (ka ) 0 2 4 6 8 10 12 14 16 18 20 i 2 t ( ma 2 s) i 2 t i ts m co ndi tion s: t ca se = 125 c v r = 0 ha lf -s in e wa ve fig.10 multi - cycle surge current fig.11 single - cycle surge current 0 2000 4000 6000 8000 10000 12000 14000 0 10 20 30 rate of decay of on-state current, di/dt - (a/us) stored charge, q s - (uc) q s (max) = 2524.7*(di/dt) 0.5257 q s (min) = 1046.8*(di/dt) 0.659 conditions: tj=125 o c, v rpeak ~ 2500v v rm ~1700v snubber as appropriate to control reverse voltages 0 50 100 150 200 250 300 350 400 450 500 0 10 20 30 rate of decay of forward current, di/dt - (a/us) reverse recovery current, i rr - (a) i rrmax = 42.033*(di/dt) 0.7538 i rrmin = 26.684*(di/dt) 0.827 conditions: tj=125 o c, v rpeak ~ 2500v v rm ~1700v snubber as appropriate to control reverse voltages fig.12 reverse recovery charge fig.13 reverse recovery current
semiconductor dcr2040l42 8/10 www.dynexsemi.com 0 1 2 3 4 5 6 7 8 9 10 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 gate trigger current i gt , - (a) gate trigger voltage, v gt - (v) tj = 125 o c tj = 25 o c tj = -40 o c preferred gate drive area upper limit lower limit fig1 4 gate characteristics 0 5 10 15 20 25 30 0 1 2 3 4 5 6 7 8 9 10 gate trigger current, i gt - (a) gate trigger voltage, v gt - (v) lower limit upper limit 5w 10w 20w 50w 100w 150w -40c fig. 1 5 gate characteristics 50 100 400 100 150 150 150 200 150 150 125 500 150 150 100 1000 150 100 25 10000 20 - - pulse width us frequency hz pulse power p gm (watts)
semiconductor dcr2040l42 9/10 www.dynexsemi.com package details for further package information, please contact cus tomer services. all dimensions in mm, unless state d otherwise. do not scale. 20 offset (nom.) cathode 3rd angle projection to gate tube ?98.9 max. ?62.85 nom. ?62.85 nom. see table for package height ? 1 . 5 anode gate if in doubt ask do not scale hole ?3.60 x 2.00 electrodes) deep (in both device maximum thickness (mm) minimum thickness (mm) dcr1374sba18 34.515 33.965 dcr1375sba28 34.59 34.04 dcr1376sba36 34.82 34.27 dcr2690l22 34.515 33.965 dcr2480l28 34.59 34.04 dcr2040l42 34.82 34.27 dcr1850l52 34.94 34.39 dcr1570l65 35.2 34.65 dcr1300l85 35.56 35.01 lead length: 420mm lead terminal connector: m4 ring package outline type code: l fig.16 package outline
semiconductor dcr2040l42 10/10 www.dynexsemi.com stresses above those listed in this data sheet may cause permanent damage to the device. in extreme c onditions, as with all semiconductors, this may include potentially hazard ous rupture of the package. appropriate safety pre cautions should always be followed. headquarters operations dynex semiconductor limited doddington road, lincoln, lincolnshire, ln6 3lf united kingdom. phone: +44 (0) 1522 500500 fax: +44 (0) 1522 500550 web: http://www.dynexsemi.com customer service phone: +(0) 1522 502753 / 502901 fax: +(0) 1522 500020 e-mail: power_solutions@dynexsemi.com dynex semiconductor 2003 technical documentation ? not for resale. produced in united kingdom. this publication is issued to provide information only wh ich (unless agreed by the company in writing) may not be used, applied or reproduced for any purpose nor form pa rt of any order or contract nor to be regarded as a representation relatin g to the products or services concerned. no warranty or guarantee express or implied is made regarding the capa bility, performance or suitability of any product or service. the company reserve s the right to alter without prior notice the specifica tion, design or price of any product or service. inform ation concerning possible methods of use is provided as a guide only and does not constitute any guarantee that such methods of use will be satisfactory in a specific piece of equipment. it is t he user?s responsibility to fully determine the performance and suitability of any e quipment using such information and to ensure that an y publication or data used is up to date and has not been superseded. these products are not suitable for use in any medical produ cts whose failure to perform may result in significant in jury or death to the user. all products and material s are sold and services provided subject to the company?s conditions of sale, which are avai lable on request. all brand names and product names used in this publ ication are trademarks, registered trademarks or tr ade names of their respective owners
|
